It is well known that many circuits rely on signal currents appearing at high impedance nodes in current sources. An ideal current source provides constant current irrespective of voltage across it, although in practice, such an ideal current source is approximated. The output impedance of such current sources may limit circuit performance parameters such as circuit gain, linearity, stability, etc. Often, transistors such as MOSFETs are used to provide high output impedance at a node in a circuit. Ideally, the MOSFET current should vary only slightly with the applied drain-to-source voltage. However, as transistors are made smaller and operating voltages are reduced, the sensitivity of the MOSFET current to the drain voltage increases.
To counteract the resulting decrease in output resistance, circuits are made more complex, either by requiring more devices, or by feedback circuitry. A cascode current source exhibits high output impedance by stacking the output devices in series. While such circuits are suitable for many low voltage applications, the high output impedance is accompanied by a reduction in the operating voltage range. For example, the voltage across the output transistors (e.g., the output voltage) may swing to a low voltage potential, thereby reducing the drain-to-source voltage of the transistors. This causes the transistors to leave the saturation region and significantly reduces the output impedance, which becomes dependent on the output voltage. Thus, the output voltage range capable of sustaining a high output impedance at the output is limited. Furthermore, the operating voltage on the input side must exceed the sum of the threshold voltages for the transistors in order to allow current to flow. Thus, in order to accommodate lower operating voltages, transistors would need to be removed from the circuit, thereby reducing the output impedance.
Another known approach utilizes level shifters in a feedback loop to extend the operating voltage range of the cascode current source. While this technique does improve operating voltage range, it may not be suitable in certain applications. For example, this technique may result in a low drain-to-source voltage at the lower of the two stacked output transistors. Thus, while the output impedance of the circuit is enhanced by the upper transistor, the overall output impedance may be significantly reduced compared to a traditional cascode structure. Furthermore, additional devices such as level shifters, amplifiers, and the like contribute to undesirable effects such as noise, longer settling time, increased power consumption, and inaccuracies associated with component matching.